The present disclosure relates to a solid-state imaging device, a driving method, and an electronic apparatus, and in particular, to a solid-state imaging device, a driving method, and an electronic apparatus capable of reducing a circuit size and a consumption power in an image sensor and realizing high speed.
In recent years, CMOS image sensors have been widely used as imaging devices. However, the CMOS image sensors may not realize the synchronicity of an entire image because their pixels are generally sequentially read.
That is, in a CMOS image sensor, a light charge generated and accumulated by a photoelectric conversion part is sequentially scanned and read (sequential scanning) for each pixel or for each row. In the case of the sequential scanning, i.e., in a case where a rolling shutter is employed as an electronic shutter, an exposure start and an exposure end for accumulating light charges may not be consistent among all the pixels. Therefore, the sequential scanning suffers from a problem where a distortion occurs in an imaging image when a moving object is imaged.
In order to perform the imaging of a high-speed-moving object that does not allow such an image distortion and perform a sensing operation that involves the synchronicity of an imaging image, a global shutter is employed as an electronic shutter where an exposure start and an exposure end are performed on all the pixels of a pixel array at the same timing.
In an image sensor that employs the global shutter as an electronic shutter, pixels have, for example, charge accumulation parts of semiconductor memories. The image sensor that employs the global shutter simultaneously transfers charges from photodiodes to the semiconductor memories so as to be stored therein and then sequentially reads them, thereby ensuring the synchronicity of an entire image (see, for example, Japanese Patent Application Laid-open No. 2008-103647).
Moreover, in recent years, there has been an increased demand for causing the CMOS image sensors to have an increased number of pixels and increase their speeds. Accordingly, vertical scanning circuits that drive the pixels are also requested to correspond to the high speeds of the CMOS image sensors. For example, if the vertical scanning circuits are arranged on both sides of the pixels for high speed, the driving performance of the CMOS image sensors can be improved as compared with the case that the vertical scanning circuit is arranged on only one side of the pixels (see, for example, Japanese Patent Application Laid-open Nos. 2005-333265 and 2000-209503).